Title :
Nanometer mixed-signal system-on-a-chip design
Author :
Chou, Eric Y. ; Sheu, Bing
fDate :
7/1/2002 12:00:00 AM
Abstract :
A mixed-signal system-on-a-chip (SoC) design methodology and the supporting CAD tools are presented. A known tools set is identified for illustration purposes and some alternative tools can equally accomplish the task.
Keywords :
circuit layout CAD; design for testability; hardware-software codesign; integrated circuit layout; mixed analogue-digital integrated circuits; product development; CAD tools; R&D prototype stage; behavioral model; bit-true model; design methodology; design tools; floating point system model; front-end design flow; functional model; integrated-circuit design; layout optimization; mixed-signal system-on-a-chip design; nanometer system-on-a-chip; planning stage; product development stage; signal integrity effects; testability; top-down design; Circuit testing; Design automation; Design engineering; Design methodology; Integrated circuit modeling; Integrated circuit testing; Prototypes; Research and development; System testing; System-on-a-chip;
Journal_Title :
Circuits and Devices Magazine, IEEE
DOI :
10.1109/MCD.2002.1021118
