A CMOS 16-bit 20MSPS analog front end for scanner/MFP applications

Author

You, Seung-Bin ; Kim, Jae-Whui ; Kim, Suki

Author_Institution

Electron. Eng. Dept., Korea Univ., Seoul, South Korea

Volume

49

Issue

3

fYear

2003

Firstpage

647

Lastpage

652

Abstract

This paper presents a monolithic 16-bit analog front end (AFE) chip for CCD/CIS scanners and multifunction peripheral (MFP) systems incorporating a 16-bit analog-to-digital converter (ADC), a 3-channel high resolution correlated double sampler (CDS), a programmable gain amplifier (PGA) and an on-chip voltage reference. The proposed AFE, fabricated in a Samsung Electronics Corporation´s (SEC´s) 0.35 μm CMOS process, occupies an active area of 8mm² and consumes 300 mW at a 3 V supply. For the full signal path (CDS-PGA-ADC), no missing code is guaranteed at a 16-bit resolution and typical differential nonlinearity (DNL) and integral nonlinearity (INL) are +1.3/-0.92 LSB and +6.7/-16.6 LSB, respectively.

Keywords

CCD image sensors; CMOS analogue integrated circuits; amplifiers; analogue integrated circuits; analogue-digital conversion; image sampling; image scanners; integrated circuit packaging; 0.35 micron; 16 bit; 3 V; 300 mW; ADC; CCD/CIS scanners; CMOS analog front end; PGA; Samsung Electronics Corporation; analog-to-digital converter; charge coupled devices; contact image sensors; correlated double sampler; differential nonlinearity; full signal path; integral nonlinearity; multifunction peripheral systems; on-chip voltage reference; programmable gain amplifier; scanner/MFP applications; Analog-digital conversion; CMOS process; Charge coupled devices; Computational Intelligence Society; Electronics packaging; High-resolution imaging; Image converters; Signal resolution; System-on-a-chip; Voltage;

fLanguage

English

Journal_Title

Consumer Electronics, IEEE Transactions on

Publisher

ieee

ISSN

0098-3063

Type

jour

DOI

10.1109/TCE.2003.1233792

Filename

1233792