DocumentCode
794209
Title
Simple and accurate propagation delay model for submicron CMOS gates based on charge analysis
Author
Rossello, J.L. ; Segura, J.
Author_Institution
Dept. de Fisica, Univ. de les Illes Baleares, Palma de Mallorca, Spain
Volume
38
Issue
15
fYear
2002
fDate
7/18/2002 12:00:00 AM
Firstpage
772
Lastpage
774
Abstract
A simple method to evaluate the propagation delay of complex CMOS gates computed from inverter delay models based on the nth-power law MOSFET model is presented. The method is based on a transistor collapsing technique developed for complex gates and takes into account short-channel effects, internal coupling capacitances and the body effect. The propagation delay of complex gates for a 0.18 μm technology is evaluated, showing excellent results
Keywords
CMOS logic circuits; MOSFET; capacitance; delays; integrated circuit modelling; semiconductor device models; 0.18 μm technology; 0.18 micron; body effect; charge analysis; internal coupling capacitances; inverter delay models; nth-power law MOSFET model; propagation delay model; short-channel effects; submicron CMOS gates; transistor collapsing technique;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:20020548
Filename
1021833
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