DocumentCode
795467
Title
VTCMOS characteristics and its optimum conditions predicted by a compact analytical model
Author
Im, Hyunsik ; Inukai, Takashi ; Gomyo, Hiroyuki ; Hiramoto, Toshiro ; Sakurai, Takayasu
Author_Institution
Inst. of Ind. Sci., Univ. of Tokyo, Japan
Volume
11
Issue
5
fYear
2003
Firstpage
755
Lastpage
761
Abstract
A compact analytical model of variable-threshold-voltage CMOS (VTCMOS) is proposed to study the active on current, linking it with the standby off-current characteristics. Comparisons of modeled results to both numerical simulations and experimental data are made with an excellent agreement. It is clearly demonstrated using the model that speed degradation due to low supply voltage can be compensated by the VTCMOS scheme, even with smaller power. Influence of the short channel effect (SCE) on the performance of VTCMOS is investigated in terms of a new parameter, dS/d/spl gamma/, both qualitatively and quantitatively. It is found that the SCE degrades the VTCMOS performance. Issues on the optimum conditions of VTCMOS and the performance of series-connected VTCMOS circuits are also discussed.
Keywords
CMOS integrated circuits; circuit optimisation; integrated circuit modelling; low-power electronics; VTCMOS characteristics; VTCMOS performance degradation; active on current; body effect; compact analytical model; low supply voltage; numerical simulations; optimum conditions; series-connected VTCMOS circuits; short channel effect; speed degradation; standby off-current characteristics; substrate bias; variable-threshold-voltage CMOS; Analytical models; Degradation; Electricity supply industry; Energy consumption; Low voltage; MOSFETs; Semiconductor device modeling; Substrates; Threshold voltage; Very large scale integration;
fLanguage
English
Journal_Title
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher
ieee
ISSN
1063-8210
Type
jour
DOI
10.1109/TVLSI.2003.814320
Filename
1234395
Link To Document