DocumentCode
796510
Title
The multiple observation time test strategy
Author
Pomeranz, Irith ; Reddy, Sudhakar M.
Author_Institution
Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
Volume
41
Issue
5
fYear
1992
fDate
5/1/1992 12:00:00 AM
Firstpage
627
Lastpage
637
Abstract
The authors consider the test generation problem, for synchronous sequential circuits in the case where hardware reset is not available (or cannot be assumed to be fault free). It is shown that the conventional testing approach, in which a fault is detected at a single predetermined time unit along the test sequence and in which the response of the circuit under test is compared against a single fault-free response, valid for all initial states of the circuit, can cause detectable faults to be declared undetectable. The use of a small number of different observation times and a small number of fault-free responses can allow the fault to be detected. Based on this observation, the use of multiple fault free responses and multiple time units for observation of the response of the circuit under test is suggested and test generation algorithms under the multiple observation time test strategy are given. Experimental results demonstrate the effectiveness and practicality of the multiple-observation-time strategy in increasing the fault coverage
Keywords
fault tolerant computing; integrated circuit testing; logic testing; sequential circuits; detectable faults; multiple fault free responses; multiple observation time test; multiple time units; synchronous sequential circuits; test generation algorithms; Circuit faults; Circuit testing; Electrical fault detection; Fault detection; Flip-flops; Hardware; Helium; Sequential analysis; Sequential circuits; Synchronous generators;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/12.142689
Filename
142689
Link To Document