DocumentCode
797068
Title
A fast radix-4 division algorithm and its architecture
Author
Srinivas, Hosahalli R. ; Parhi, Keshab K.
Author_Institution
AT&T Bell Labs., Allentown, PA, USA
Volume
44
Issue
6
fYear
1995
fDate
6/1/1995 12:00:00 AM
Firstpage
826
Lastpage
831
Abstract
In this paper we present a fast radix-4 division algorithm for floating point numbers. This method is based on Svoboda´s division algorithm and the radix-4 redundant number system. The algorithm involves a simple recurrence with carry-free addition and employs prescaling of the operands. In the proposed divider implementation, each radix-4 digit (belonging to set {-3,...,+3}) of the quotient and partial remainder is encoded using two radix-2 digits (belonging to the set {-1,0,+1}) and this leads to hardware simplicity. The quotient digits are determined by observing three most-significant radix-2 digits of the partial remainder and independent of the divisor. The architecture presented for the proposed algorithm is faster than previously proposed radix-4 dividers, which require at least four digits of the partial remainder to be observed to determine quotient digits
Keywords
floating point arithmetic; redundant number systems; Svoboda´s division algorithm; carry-free addition; fast radix-4 division algorithm; floating point numbers; hardware simplicity; quotient digits; radix-4 redundant number system; Algorithm design and analysis; Computer architecture; Hardware; Logic;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/12.391179
Filename
391179
Link To Document