• DocumentCode
    797338
  • Title

    Complementary-SCR ESD protection circuit with interdigitated finger-type layout for input pads of submicron CMOS IC´s

  • Author

    Ker, Ming-Dou ; Wu, Chung-Yu

  • Author_Institution
    Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu, Taiwan
  • Volume
    42
  • Issue
    7
  • fYear
    1995
  • fDate
    7/1/1995 12:00:00 AM
  • Firstpage
    1297
  • Lastpage
    1304
  • Abstract
    A new ESD protection circuit with complementary SCR structures and junction diodes is proposed. This complementary-SCR ESD protection circuit with interdigitated finger-type layout has been successfully fabricated and verified in a 0.6 μm CMOS SRAM technology with the LDD process. The proposed ESD protection circuit can be free of VDD-to-VSS latchup under 5 V VDD operation by means of a base-emitter shorting method. To compensate for the degradation on latching capability of lateral SCR devices in the ESD protection circuit caused by the base-emitter shorting method, the p-well to p-well spacing of lateral BJT´s in the lateral SCR devices is reduced to lower its ESD-trigger voltage and to enhance turn-on speed of positive-feedback regeneration in the lateral SCR devices. This ESD protection circuit can perform at high ESD failure threshold in small layout areas, so it is very suitable for submicron CMOS VLSI/ULSI´s in high-pin-count or high-density applications
  • Keywords
    CMOS integrated circuits; ULSI; VLSI; electrostatic discharge; integrated circuit layout; integrated circuit technology; protection; 0.6 micron; 5 V; CMOS SRAM technology; ESD protection circuit; LDD process; VDD-to-VSS latchup; base-emitter shorting method; complementary SCR structures; high ESD failure threshold; high-density applications; high-pin-count applications; input pads; interdigitated finger-type layout; junction diodes; lateral SCR devices; positive-feedback regeneration; submicron CMOS IC; submicron CMOS ULSI; submicron CMOS VLSI; CMOS process; CMOS technology; Circuits; Degradation; Diodes; Electrostatic discharge; Protection; Random access memory; Thyristors; Voltage;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/16.391212
  • Filename
    391212