A Low Power Charge Sensitive Amplification and Fast Coincidence System for Space Application

A charge sensitive FET amplifier and coincidence system for solid state detectors and random counting rates of 350,000/sec is described. The fully depleted Si surface barrier detectors are decoupled to the FET input stages of the preamplifiers which produce pulses of 30 ns risetime with a 100 ns decay constant. The postamplifiers are integrating and differentiating and generate negative going bipolar pulses of 1 ??s length. The dynamic range goes from 25 mV to 5 volts at a stability of 3% over a temperature range from -30??C to +50??C. With 60 pf input capacity the noise is 38 KeV. A set of threshold discriminators rejects noise and strobes the subsequent zero crossovers detectors. The outputs are square pulses which activate a 40 ns tunnel diode coincidence circuit. The power consumption of the complete system is 150 mw. Miniaturized PC board construction is used for packaging.