DocumentCode
799161
Title
Massively parallel computation using a splitting-up operator method for three-dimensional device simulation
Author
Odanaka, Shinji ; Nogi, Tatsuo
Author_Institution
Semicond. Res. Center, Matsushita Electr. Ind. Co. Ltd., Osaka, Japan
Volume
14
Issue
7
fYear
1995
fDate
7/1/1995 12:00:00 AM
Firstpage
824
Lastpage
832
Abstract
This paper presents a new parallel algorithm and performance results of iterative solution methods for three-dimensional MOSFET simulation with Gummel´s method. A splitting-up operator method is proposed for incomplete factorization of sparse matrices arising from semiconductor device equations, suitable for parallel computations. This method is combined with the conjugate gradients and BiCGSTAB procedure to obtain a new parallel version of the iterative solution methods. Natural parallelism is realized by developing the solution method according to the natural ordering. In large-scale simulations of greater than 100000 grid nodes, the high parallel efficiency level over 90% can be achieved using a new-type massively parallel computer: ADENART with up to 256 processors. The real performance of the solution methods is superior to those calculated by the vectorized version of the ICCG and ILUBiCGSTAB methods using a vector-type supercomputer
Keywords
MOS integrated circuits; MOSFET; VLSI; circuit CAD; circuit analysis computing; conjugate gradient methods; digital simulation; iterative methods; parallel algorithms; semiconductor device models; sparse matrices; ADENART; BiCGSTAB procedure; Gummel´s method; MOSFET simulation; conjugate gradients; incomplete factorization; iterative solution methods; large-scale simulations; massively parallel computation; parallel algorithm; semiconductor device equations; sparse matrices; splitting-up operator method; three-dimensional device simulation; Computational modeling; Concurrent computing; Equations; Iterative methods; Large-scale systems; MOSFET circuits; Parallel algorithms; Parallel processing; Semiconductor devices; Sparse matrices;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/43.391730
Filename
391730
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