DocumentCode
802363
Title
Trenching observed during sidewall formation in GaAs self-aligned refractory gate FETs
Author
Baca, A.G. ; Howard, A.J. ; Shul, R.J. ; Sherwin, M.E.
Author_Institution
Sandia Nat. Labs., Albuquerque, NM, USA
Volume
32
Issue
1
fYear
1996
fDate
1/4/1996 12:00:00 AM
Firstpage
73
Lastpage
74
Abstract
GaAs removal of ~21 nm in the form of a trench has been observed as a result of sidewall etching in a W-based refractory gate sidewall process used for self-aligned GaAs FETs. This unintentional material removal is of increasing concern as the active channel of the FET becomes shallower. Virtual elimination of trenching is achieved by changing the sidewall dielectric from SiO2 to Si3N 4
Keywords
III-V semiconductors; Schottky gate field effect transistors; dielectric thin films; gallium arsenide; sputter etching; tungsten; MESFETs; RIE; W-GaAs; active channel; self-aligned refractory gate FETs; sidewall dielectric; sidewall etching; trenching;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19960017
Filename
490739
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