• DocumentCode
    802802
  • Title

    CMOS current mode winner-take-all circuit with distributed hysteresis

  • Author

    DeWeerth, S.P. ; Morris, T.G.

  • Author_Institution
    Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
  • Volume
    31
  • Issue
    13
  • fYear
    1995
  • fDate
    6/22/1995 12:00:00 AM
  • Firstpage
    1051
  • Lastpage
    1053
  • Abstract
    An analogue-VLSI winner-take-all circuit is enhanced through the addition of hysteretic feedback that emphasises the spatial locality of competing signals using a resistive network. This circuit has applications to tasks in areas such as image processing, in which inputs are not stationary with respect to the circuit array
  • Keywords
    VLSI; circuit feedback; computer vision; focal planes; hysteresis; logic circuits; real-time systems; CMOS current mode winner-take-all circuit; analogue-VLSI winner-take-all circuit; circuit array; distributed hysteresis; hysteretic feedback; image processing; resistive network; spatial locality;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19950729
  • Filename
    392701
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=802802