A Controlled Timing Switch for Fault Studies

This paper describes the design, construction and testing of a controlled timing switch suitable for introducing balanced and unbalanced faults of controlled duration at predetermined instants on laboratory-size machine systems. The work is part of a final year Project Laboratory course and was completed during a period of six weeks. The switch employs a simple force-commutated thyristor arrangement with easy to maintain and reliable components. There is a discussion on the switch design including some guidelines for the choice of components for the switch. The factors to be considered in the use of thyristors when they are used for switching operations are detailed. Results of some typical tests on a 3 kVa, 208/120 volt, 60 Hz synchronous machine system using the switch, are also included.