DocumentCode :
805301
Title :
Self-Substrate-Triggered Technique to Enhance Turn-On Uniformity of Multi-Finger ESD Protection Devices
Author :
Ker, Ming-Dou ; Chen, Jia-Huei
Author_Institution :
Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu
Volume :
41
Issue :
11
fYear :
2006
Firstpage :
2601
Lastpage :
2609
Abstract :
A novel self-substrate-triggered technique for on-chip ESD protection design is proposed to solve the non-uniform turn-on phenomenon of multi-finger gate-grounded nMOS (GGnMOS). The center-finger nMOS transistors in the multi-finger GGnMOS structure are always turned on first under ESD stress, so its source terminal is connected to the base (substrate) terminals of the other parasitic lateral n-p-n bipolar transistors (BJTs in the GGnMOS structure) to form the self-substrate-triggered design. With the proposed self-substrate-triggered technique, the first turned-on center-finger nMOS transistors are used to trigger on the others. Therefore, all fingers of GGnMOS can be triggered on simultaneously to discharge ESD current. From the experimental results verified in a 0.13-mum CMOS process with the thin gate oxide of 25 Aring, the turn-on uniformity and ESD robustness of the GGnMOS can be greatly improved without increasing extra layout area through the proposed self-substrate-triggered technique
Keywords :
CMOS integrated circuits; MOSFET; electrostatic discharge; protection; substrates; 0.13 micron; 25 Aring; BJT; CMOS process; ESD current; center-finger nMOS transistors; multifinger ESD protection devices; multifinger GGnMOS structure; multifinger gate-grounded nMOS; n-p-n bipolar transistors; nonuniform turn-on phenomenon; on-chip ESD protection design; self-substrate-triggered technique; thin gate oxide; turn-on uniformity; CMOS process; CMOS technology; Electrostatic discharge; Fingers; MOS devices; MOSFETs; Protection; Robustness; Stress; Voltage; Electrostatic discharge (ESD); multi-finger gate-grounded nMOS; non-uniform turn-on phenomenon; self-substrate-triggered technique;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2006.883331
Filename :
1717682
Link To Document :
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