DocumentCode :
805665
Title :
High-performance logic and high-gain analog CMOS transistors formed by a shadow-mask technique with a single implant step
Author :
Hook, Terence B. ; Brown, Jeffery S. ; Breitwisch, Matthew ; Hoyniak, Dennis ; Mann, Randy
Author_Institution :
Semicond. Res. & Dev. Center, IBM Corp., Essex Junction, VT, USA
Volume :
49
Issue :
9
fYear :
2002
fDate :
9/1/2002 12:00:00 AM
Firstpage :
1623
Lastpage :
1627
Abstract :
Transistors have been fabricated with a photoresist mask placed in close proximity to the gate so as to effectively block the angled halo implant from the gate region. Devices for which the halo has been eliminated demonstrate superior drain conductance, while devices with the halo implant show the short-channel effect required for high performance. Asymmetric devices have also been fabricated in a similar manner, producing devices with improved analog characteristics without an additional masking layer
Keywords :
CMOS analogue integrated circuits; CMOS logic circuits; ion implantation; masks; photoresists; CMOSFETs; angled halo implant; drain conductance; high-gain analog CMOS; high-performance logic; photoresist mask; shadow-mask technique; short-channel effect; single implant step; Breakdown voltage; CMOS integrated circuits; CMOS logic circuits; CMOSFET circuits; Doping; Helium; Implants; Resists; Threshold voltage; Voltage control;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2002.802623
Filename :
1027847
Link To Document :
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