Title :
Computer simulation of IGBT losses in PFC circuits
Author_Institution :
Toledo Univ., OH
fDate :
7/1/1995 12:00:00 AM
Abstract :
An analysis is presented that forms the basis for an algorithm for calculating the IGBT losses in a power factor correction (PFC) circuit. The method employs experimental data from an off-line test circuit that closely resembles the switching conditions in the actual PFC. This technique provides calculated values of both the conduction and switching losses of the main transistor in a boost-type PFC circuit. Results for a 6 kW PFC are included
Keywords :
digital simulation; insulated gate bipolar transistors; losses; power engineering computing; power factor correction; power semiconductor switches; 6 kW; IGBT losses; PFC circuits; boost-type PFC circuit; conduction; off-line test circuit; power factor correction; switching conditions; switching losses; transistor; Circuit analysis; Circuit simulation; Circuit testing; Computer simulation; Current measurement; Insulated gate bipolar transistors; Loss measurement; Power factor correction; Switches; Switching loss;
Journal_Title :
Aerospace and Electronic Systems, IEEE Transactions on
