DocumentCode
80743
Title
D
/D
-Control Methods for the SiC JFET/Si MOSFET Cascode
Author
Aggeler, D. ; Canales, Francisco ; Biela, Juergen ; Kolar, Johann Walter
Author_Institution
Power Electron. Syst. Lab., ETH Zurich, Zurich, Switzerland
Volume
28
Issue
8
fYear
2013
fDate
Aug. 2013
Firstpage
4074
Lastpage
4082
Abstract
Switching devices based on SiC offer outstanding performance with respect to operating frequency, junction temperature, and conduction losses enabling significant improvement of the performance of converter systems. There, the cascode consisting of a MOSFET and a JFET has additionally the advantage of being a normally off device and offering a simple control via the gate of the MOSFET. Without dv /dt-control, however, the transients for hard commutation reach values of up to 45kV/μs, which could lead to electromagnetic interference problems. Especially in drive systems, problems could occur, which are related to earth currents (bearing currents) due to parasitic capacitances. Therefore, new dv/d t-control methods for the SiC JFET/Si MOSFET cascode as well as measurement results are presented in this paper. Based on this new concepts, the outstanding performance of the SiC devices can be fully utilized without impairing electromagnetic compatibility.
Keywords
MOSFET; electromagnetic compatibility; junction gate field effect transistors; switching convertors; Dv-Dt -control methods; JFET MOSFET cascode; SiC; bearing currents; conduction losses; converter systems; earth currents; electromagnetic compatibility; electromagnetic interference problems; hard commutation; junction temperature; operating frequency; parasitic capacitances; switching devices; Capacitance; JFETs; Logic gates; MOSFET circuits; Silicon; Silicon carbide; Switches; SiC JFET; SiC-Si cascode; d$v$ /d$t$ -control methods;
fLanguage
English
Journal_Title
Power Electronics, IEEE Transactions on
Publisher
ieee
ISSN
0885-8993
Type
jour
DOI
10.1109/TPEL.2012.2230536
Filename
6365336
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