Si bipolar chip set for 10-Gb/s optical receiver

Author

Suzaki, Tetsuyuki ; Soda, Masaaki ; Morikawa, Takenori ; Tezuka, Hiroshi ; Ogawa, Chihiro ; Fujita, Sadao ; Takemura, Hisashi ; Tashiro, Tsutomu

Author_Institution

Opto-Electron. Res. Lab., Kanagawa, Japan

Volume

27

Issue

12

fYear

1992

fDate

12/1/1992 12:00:00 AM

Firstpage

1781

Lastpage

1786

Abstract

Three Si bipolar ICs, a preamplifier, a gain-controllable amplifier, and a decision circuit, have been developed for 10-Gb/s optical receivers. A dual-feedback configuration with a phase adjustment capacitor makes it possible to increase the preamplifier bandwidth up to 11.2 GHz, while still retaining flat frequency response. The gain-controllable amplifier, which utilizes a current-dividing amplifier stage, has an 11.4-GHz bandwidth with 20-dB gain variation. A master-slave D-type flip-flop is also operated as the decision circuit at 10 Gb/s. On-chip coplanar lines were applied to minimize the electrical reflection between the ICs

Keywords

bipolar integrated circuits; digital communication systems; digital integrated circuits; elemental semiconductors; feedback; flip-flops; gain control; optical receivers; preamplifiers; silicon; wideband amplifiers; 10 Gbit/s; 11.2 GHz; Si bipolar chip set; current-dividing amplifier stage; decision circuit; dual-feedback configuration; flat frequency response; gain-controllable amplifier; master-slave D-type flip-flop; onchip coplanar lines; optical receiver; phase adjustment capacitor; preamplifier; Bandwidth; Capacitors; Circuits; Flip-flops; Frequency response; Master-slave; Optical amplifiers; Optical receivers; Preamplifiers; Semiconductor optical amplifiers;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.173105

Filename

173105