11.6-GHz 1:4 regenerating demultiplexer with bit-rotation control and 6.1-GHz auto-latching phase-aligner ICs using AlGaAs/GaAs HBT technology

Author

Bagheri, Mehran ; Wang, Keh-Chung ; Chang, Mau-Chung F. ; Nubling, Randy B. ; Asbeck, Peter M. ; Chen, Andy

Author_Institution

Bellcore, Red Bank, NJ, USA

Volume

27

Issue

12

fYear

1992

fDate

12/1/1992 12:00:00 AM

Firstpage

1787

Lastpage

1793

Abstract

The authors present an 11.6-GHz 1:4 regenerating demultiplexer (demux) and a 6.1-GHz phase aligner, implemented using high-current-gain baseline AlGaAs/GaAs heterojunction bipolar transistor (HBT) technology. The demux features a hybrid tree/shift register-type architecture optimized for high-speed and low-power operation, and is the fastest demux with bit-rotation control ever reported. It consumes 1.4 W of power with a single -5 V supply, and has a phase margin of 270° and differential input data sensitivity of 56 mV_p-p at 11.6 Gb/s. The phase aligner incorporates an auto-latching scheme which allows the data to be latched using a timing signal derived on-chip from the data, and is the fastest fully monolithic phase aligner ever reported. It dissipates 0.8 W of power with a single -5 V supply and has differential input data sensitivity of 60 mV_p-p at 6.1 Gb/s

Keywords

III-V semiconductors; aluminium compounds; bipolar integrated circuits; demultiplexing equipment; digital communication systems; digital integrated circuits; gallium arsenide; heterojunction bipolar transistors; optical communication equipment; -5 V; 0.8 W; 1.4 W; 11.6 GHz; 11.6 Gbit/s; 6.1 Gbit/s; 6.2 GHz; AlGaAs-GaAs; HBT technology; auto-latching scheme; bit-rotation control; demux; heterojunction bipolar transistor; high-speed; hybrid tree/shift register-type architecture; low-power operation; phase-aligner; regenerating demultiplexer; single -5 V supply; Bipolar integrated circuits; Clocks; Delay; Gallium arsenide; Heterojunction bipolar transistors; High speed integrated circuits; Paper technology; SONET; Synchronous digital hierarchy; Timing;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.173106

Filename

173106