Off-chip Iddq monitor with standard test interface

Off-chip current testing is being considered as an efficient mechanism for improving the quality of electronic systems at the printed circuit board level. This well known fact is linked with the industry accepted testing interface standard IEEE P1149.1 (`Standard test access port and boundary-scan architecture´). A specific integrated circuit with the capability of concurrently measuring the quiescent current level for two integrated circuits under test (ICCUT) is presented with its basis. Architecture and implementation details. All the functions of the monitors are accessible via the standard test access port