• DocumentCode
    808609
  • Title

    Low-power InP-HEMT switch ICs integrating miniaturized 2×2 switches for 10-Gb/s systems

  • Author

    Kamitsuna, Hideki ; Yamane, Yasuro ; Tokumitsu, Masami ; Sugahara, Hirohiko ; Muraguchi, Masahiro

  • Author_Institution
    NTT Photonics Labs., NTT Corp., Kanagawa, Japan
  • Volume
    41
  • Issue
    2
  • fYear
    2006
  • Firstpage
    452
  • Lastpage
    460
  • Abstract
    This paper presents a wideband cold-FET switch with virtually zero power dissipation. The use of InP HEMTs with a low Ron·Coff product enables us to configure a DC-to-over-10-GHz single-pole double-throw (SPDT) switch without using a shunt FET. The series-FET configuration offers a logic-level-independent interface and makes possible positive control voltage operation in spite of using depletion-mode FETs. A miniaturized 2×2 switch using two SPDT switches yields an insertion loss of less than 1.16 dB and isolation of more than 21.2 dB below 10 GHz, which allows us to increase the scale of the switch in a single chip easily. The add-drop operation combining two 2×2 switches in a single chip and a 4×4 switch IC integrating four 2×2 switches are presented. The packaged ICs achieve error-free operation up to 12.5 Gb/s with either positive or negative logic-level input. Extremely fast switching of ∼140 ps is also successfully demonstrated.
  • Keywords
    HEMT integrated circuits; III-V semiconductors; field effect transistor switches; indium compounds; integrated circuit packaging; low-power electronics; 10 Gbit/s; FET switches; HEMT switches; InP; SPDT switch; add-drop operation; depletion-mode FET; insertion loss; integrated circuit package; logic-level-independent interface; negative logic-level input; positive logic-level input; series-FET configuration; single-pole double-throw switch; switch integrated circuit; FETs; HEMTs; Indium phosphide; Insertion loss; MODFETs; Packaging; Power dissipation; Switches; Voltage control; Wideband; FET switches; InP HEMT; RF switches; logic-level independence; low power; series-FET configuration;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.2005.862354
  • Filename
    1583809