DocumentCode
808832
Title
Leakage current modeling of series-connected thin film transistors
Author
Sturm, J.C. ; Wu, I.W. ; Hack, M.
Author_Institution
Dept. of Electr. Eng., Princeton Univ., NJ, USA
Volume
42
Issue
8
fYear
1995
fDate
8/1/1995 12:00:00 AM
Firstpage
1561
Lastpage
1563
Abstract
The leakage current of an arbitrary number of series-connected polysilicon Thin Film Transistors (TFTs) with a common gate is shown to be easily computed from the I-V characteristics of a single FET for the first time, both by an analytical model and by graphical techniques. Good agreement with experimental data is obtained for drain biases greater than ∼1 V. The work is also applicable to single crystal Silicon-On-Insulator (SOI) TFTs.
Keywords
insulated gate field effect transistors; leakage currents; semiconductor device models; silicon-on-insulator; thin film transistors; 1 V; I-V characteristics; SOI TFT; Si; analytical model; drain bias; graphical techniques; leakage current modeling; polysilicon TFT; series-connected TFT; thin film transistors; Active matrix liquid crystal displays; Active matrix technology; Analytical models; Circuits; Computer hacking; FETs; Leakage current; Silicon on insulator technology; Thin film transistors; Voltage;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/16.398673
Filename
398673
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