Title :
An efficient signature computation method
Author :
Saluja, Kewal K. ; See, Chin-Foo
Author_Institution :
Dept. of Electr. & Comput. Eng., Wisconsin Univ., Madison, WI, USA
Abstract :
A signature generation algorithm for linear-feedback shift register (LFSR)-based compactors used in fault simulation of built-in self-test digital circuits is presented. The algorithm uses small- to medium-size lookup tables to generate signatures for internal as well as external exclusive-OR LFSRs of any length. The basic concept can be extended to general linear compactors. Algorithms that convert signatures from one form of LFSR to the other are also presented.<>
Keywords :
built-in self test; comparators (circuits); feedback; logic testing; shift registers; table lookup; LFSRs; built-in self-test digital circuits; compactors; exclusive-OR; fault simulation; linear-feedback shift register; lookup tables; signature computation method; signature generation algorithm; Built-in self-test; Circuit faults; Circuit simulation; Circuit testing; Compaction; Computational modeling; Hardware; Polynomials; System performance; Table lookup;
Journal_Title :
Design & Test of Computers, IEEE
