Limitation of CMOS supply-voltage scaling by MOSFET threshold-voltage variation

A fundamental limit of CMOS supply-voltage (V_cc) scaling has been investigated and quantified as a function of the statistical variation of MOSFET threshold-voltage (V_T). Based on the data extracted from a sub 0.5 μm logic technology, the variation of ring-oscillator propagation-delay (T_d) significantly increases as V_cc is scaled down towards the MOSFET V_T. An empirical power-law relationship was then derived to describe the scattering of circuit speed (ΔT_pd ) as a function of MOSFET V_T variation (ΔV_T ) and (V_cc-V_T). Agreement between the model and the experimental data was established for V_cc values from 4.0 to 0.9 V. This fundamental limit of CMOS V_cc, scaling poses an additional challenge for the design and manufacturing of high-performance, low-power portable systems and battery-based equipment