Implementation of Initial-On ESD Protection Concept With PMOS-Triggered SCR Devices in Deep-Submicron CMOS Technology

Author

Ker, Ming-Dou ; Chen, Shih-Hung

Author_Institution

Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu

Volume

42

Issue

5

fYear

2007

fDate

5/1/2007 12:00:00 AM

Firstpage

1158

Lastpage

1168

Abstract

In order to enhance the applications of SCR devices for deep-submicron CMOS technology, a novel SCR design with "initial-on" function is proposed to achieve the lowest trigger voltage and the highest turn-on efficiency of SCR device for effective on-chip ESD protection. Without using the special native device (NMOS with almost zero or even negative threshold voltage) or any process modification, this initial-on SCR design is implemented by PMOS-triggered SCR device, which can be realized in general CMOS processes. This initial-on SCR design has a high enough holding voltage to avoid latchup issues in a VDD operation voltage of 2.5 V. The new proposed initial-on ESD protection design with PMOS-triggered SCR device has been successfully verified in a fully-silicided 0.25-mum CMOS process

Keywords

CMOS integrated circuits; MOSFET; electrostatic discharge; thyristors; 0.25 micron; 2.5 V; CMOS process; ESD protection concept; PMOS-triggered SCR devices; SCR design; deep-submicron CMOS technology; initial-on function; CMOS integrated circuits; CMOS process; CMOS technology; Clamps; Electrostatic discharge; Protection; Robustness; Stress; Thyristors; Voltage; Electrostatic discharges (ESD); holding voltage; silicon controlled rectifier (SCR); turn-on efficiency;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2007.894823

Filename

4160074