Impact of Oxide Thickness on Gate Capacitance—A Comprehensive Analysis on MOSFET, Nanowire FET, and CNTFET Devices

Carbon nanotube-based FET devices are getting more and more importance today because of their high channel mobility and improved gate capacitance against gate voltage. This paper compares and analyzes the effect of variation of oxide thickness on gate capacitance for single gate MOSFET, double gate MOSFET, silicon nanowire FET, and CNTFET devices through an exhaustive simulation. It is seen that in nanometer regime quantum capacitance is the deciding factor in calculating the gate capacitance of a FET device. CNTFET and silicon nanowire FET have a favorable characteristics of decreasing gate capacitance with the decrease in oxide thickness in deep nanometer regime, which is not possible to get in a single gate or a double gate MOSFET. This decrease in gate capacitance is observed at a gate voltage of 0.5 V and above which leads to reduced propagation delay and lower leakage compared to MOSFET devices.