DocumentCode
815028
Title
Low Noise Jfet with Integral Reset Diode
Author
McKenzie, J.M. ; Witt, L.J.
Author_Institution
Sandia Laboratories Albuquerque, New Mexico 87115
Volume
21
Issue
1
fYear
1974
Firstpage
794
Lastpage
797
Abstract
A low noise JFET has been built with a small diode diffused in the gate circuit. For these initial experiments the chips were bonded to an available 4-lead ceramic insulated header. Both dc and pulsed reset methods are possible. The present experiments with a dc reset method indicate that the device when optimized should give, at low count rates, similar resolution to opto-electronic feedback. An output count rate of 20,000 c/s at 6 keV adds 150 eV of noise.
Keywords
Capacitance; Circuit noise; Detectors; Diodes; Gate leakage; Leak detection; Leakage current; Pulse amplifiers; Pulse circuits; Voltage;
fLanguage
English
Journal_Title
Nuclear Science, IEEE Transactions on
Publisher
ieee
ISSN
0018-9499
Type
jour
DOI
10.1109/TNS.1974.4327552
Filename
4327552
Link To Document