• DocumentCode
    81567
  • Title

    A Common Core Model for Junctionless Nanowires and Symmetric Double-Gate FETs

  • Author

    Sallese, Jean-Michel ; Jazaeri, Farzan ; Barbut, Lucian ; Chevillon, Nicolas ; Lallement, Christophe

  • Author_Institution
    EPFL, Lausanne, Switzerland
  • Volume
    60
  • Issue
    12
  • fYear
    2013
  • fDate
    Dec. 2013
  • Firstpage
    4277
  • Lastpage
    4280
  • Abstract
    In this paper, we evidence the link between the planar and cylindrical junctionless field effect transistors (JL-FETs) from the electrostatics and current point of view. In particular, we show that an approximate solution of the Poisson-Boltzmann equation for JL nanowires can be mapped on the planar double-gate topology generating only negligible mismatch, meaning that both devices can share the same core model as far as long channels are considered. These preliminary results are a first step toward a unification of compact models for JL-FETs.
  • Keywords
    Boltzmann equation; Poisson equation; field effect transistors; nanowires; semiconductor device models; Poisson-Boltzmann equation; common core model; cylindrical junctionless field effect transistors; electrostatics; junctionless nanowires; planar double-gate topology; symmetric double-gate FET; Doping; Logic gates; Mobile communication; Nanowires; Semiconductor device modeling; Semiconductor process modeling; Silicon; Double gate (DG); enhancement mode; field effect transistor (FET); junctionless; modeling; nanowires (NWs);
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2013.2287528
  • Filename
    6655966