Title :
A mismatch-dependent power allocation technique for match-line sensing in content-addressable memories
Author :
Arsovski, Igor ; Sheikholeslami, Ali
Author_Institution :
Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada
Abstract :
In the conventional content-addressable memory (CAM), equal power is consumed to determine if a stored word is matched to a search word or mismatched, independent of the number of mismatched bits. This paper presents a match-line (ML) sensing scheme that allocates less power to match decisions involving a larger number of mismatched bits. Since the majority of CAM words are mismatched, this scheme results in a significant CAM power reduction. The proposed ML sensing scheme is implemented in a 256 × 144-bit ternary CAM for a 0.13-μm 1.2-V CMOS logic process. For a 2-ns search time on a 144-bit word, the proposed scheme saves 60% of the power consumed by the conventional sensing scheme.
Keywords :
CMOS logic circuits; SPICE; circuit simulation; content-addressable storage; low-power electronics; memory architecture; 0.13 micron; 1.2 V; 144 bit; 2 ns; 36864 bit; CAM; CAM power reduction; CMOS logic process; HSPICE simulations; content-addressable memories; current sensing; decision matching; low power; match-line sensing; mismatch-dependent power allocation technique; pattern matching; power consumption; search word mismatching; stored word matching; string matching; CADCAM; CMOS logic circuits; CMOS process; Computer aided manufacturing; Multilevel systems; Multivalued logic; Network address translation; Neural networks; Pattern matching; Pattern recognition;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2003.818139