• DocumentCode
    817005
  • Title

    Robust Cu Dual Damascene Interconnects With Porous SiOCH Films Fabricated by Low-Damage Multi-Hard-Mask Etching Technology

  • Author

    Ohtake, Hiroto ; Tagami, Masayoshi ; Tada, Munehiro ; Ueki, Makoto ; Abe, Mari ; Saito, Shinobu ; Ito, Fuminori ; Hayashi, Yoshihiro

  • Author_Institution
    Inst. of Fluid Sci., Tohoku Univ., Sendai
  • Volume
    19
  • Issue
    4
  • fYear
    2006
  • Firstpage
    455
  • Lastpage
    464
  • Abstract
    Low-damage hard-mask (HM) plasma-etching technology for porous SiOCH film (k=2.6) has been developed for robust 65-nm-node Cu dual damascene interconnects (DDIs). No damage is introduced by fluorocarbon plasma etching irrespective of whether rigid (k=2.9) or porous (k=2.6) SiOCH films are used, due to the protective CF-polymer layer deposited on the etched sidewall. The etching selectivity of the SiOCH films to the inorganic HMs is kept high by controlling the radical ratio of carbon relative to oxygen in the etching plasma gas. However, oxidation damage penetrates the films from the sidewalls due to the O2 plasma used for photoresist ashing. This damage is increased by the porous structure. As a result, we developed a via-first multi-hard-mask process for the DD structure in porous SiOCH film with no exposure to O 2-ashing plasma, and we controlled the via-taper angle by RF bias during etching. We fabricated robust Cu DDIs with tapered vias in porous SiOCH film that can be applied to 65-nm-node ULSIs and beyond
  • Keywords
    copper; integrated circuit interconnections; low-k dielectric thin films; masks; nanotechnology; porous materials; silicon compounds; sputter etching; 65 nm; Cu; SiOCH; ULSI; dual damascene interconnects; etching selectivity; fluorocarbon plasma etching; inorganic HM; multi-hard mask etching technology; oxidation damage; photoresist ashing; plasma gas; porous films; protective CF-polymer layer; Etching; Indium tin oxide; Laboratories; Optimal control; Oxidation; Plasma applications; Protection; Resists; Robustness; Ultra large scale integration;
  • fLanguage
    English
  • Journal_Title
    Semiconductor Manufacturing, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0894-6507
  • Type

    jour

  • DOI
    10.1109/TSM.2006.883593
  • Filename
    4012099