Title :
Ant Colony Optimizations for Resource- and Timing-Constrained Operation Scheduling
Author :
Wang, Gang ; Gong, Wenrui ; Derenzi, Brian ; Kastner, Ryan
Author_Institution :
Dept. of Electr. & Comput. Eng., California Univ., Santa Barbara, CA
fDate :
6/1/2007 12:00:00 AM
Abstract :
Operation scheduling (OS) is a fundamental problem in mapping an application to a computational device. It takes a behavioral application specification and produces a schedule to minimize either the completion time or the computing resources required to meet a given deadline. The OS problem is NP-hard; thus, effective heuristic methods are necessary to provide qualitative solutions. We present novel OS algorithms using the ant colony optimization approach for both timing-constrained scheduling (TCS) and resource-constrained scheduling (RCS) problems. The algorithms use a unique hybrid approach by combining the MAX-MIN ant system metaheuristic with traditional scheduling heuristics. We compiled a comprehensive testing benchmark set from real-world applications in order to verify the effectiveness and efficiency of our proposed algorithms. For TCS, our algorithm achieves better results compared with force-directed scheduling on almost all the testing cases with a maximum 19.5% reduction of the number of resources. For RCS, our algorithm outperforms a number of different list-scheduling heuristics with better stability and generates better results with up to 14.7% improvement. Our algorithms outperform the simulated annealing method for both scheduling problems in terms of quality, computing time, and stability
Keywords :
computational complexity; minimax techniques; scheduling; simulated annealing; NP-hard; ant colony optimizations; force-directed scheduling; heuristic methods; hybrid approach; list scheduling; max-min ant system metaheuristic; operation scheduling; resource-constrained scheduling; simulated annealing method; timing-constrained scheduling; Ant colony optimization; Circuit synthesis; Field programmable gate arrays; Hardware; Integrated circuit synthesis; Microprocessors; Processor scheduling; Scheduling algorithm; Stability; Testing; Force-directed scheduling (FDS); MAX–MIN ant system (MMAS); list scheduling; operation scheduling (OS);
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
DOI :
10.1109/TCAD.2006.885829