Effects of data rate and transistor size on single event upset cross-sections for InP-based circuits

Author

Hansen, D.L. ; Chu, P. ; Meyer, S.F.

Author_Institution

Boeing Satellite Syst., Los Angeles, CA

Volume

52

Issue

6

fYear

2005

Firstpage

3166

Lastpage

3171

Abstract

We present results from SEU testing of two limiter-amplifier ASICs. The circuits are electrically identical except that they are fabricated using different generations InP-based HBT technology. Cross sections measured at clock speeds of 6.4 and 12.8 GHz show technology dependence, and are analyzed to determine charge collection dynamics. Our results agree with previous simulations, as well as experiments on similar technologies

Keywords

amplifiers; application specific integrated circuits; heterojunction bipolar transistors; nuclear electronics; InP-based HBT technology; InP-based circuits; SEU testing; charge collection dynamics; clock speeds; data rate effects; electrically identical circuits; heterojunction bipolar transistors; indium compounds; limiter-amplifier ASIC; single event upset cross-sections; transistor size; Charge measurement; Circuit testing; Clocks; Current measurement; Frequency; Heterojunction bipolar transistors; Single event upset; Space technology; Space vehicles; Velocity measurement; Heterojunction bipolar transistors; indium compounds; single event upset (SEU);

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/TNS.2005.855646

Filename

1589340