DocumentCode
820784
Title
A CMOS neural network for pattern association
Author
Walker, Mark ; Hasler, Paul ; Akers, Lex
Author_Institution
Arizona State Univ., Tempe, AZ, USA
Volume
9
Issue
5
fYear
1989
Firstpage
68
Lastpage
74
Abstract
The authors present an analog complementary metal-oxide semiconductor (CMOS) version of a model for pattern association, along with discussions of design philosophy, electrical results, and a chip architecture for a 512-element, feed-forward IC. They discuss hardware implementations of neural networks and the effect of limited interconnections. They then examine network design, processor-element design, and system operation.<>
Keywords
CMOS integrated circuits; neural nets; pattern recognition; CMOS neural network; chip architecture; electrical results; hardware implementations; limited interconnections; pattern association; processor-element design; system operation; Analog integrated circuits; CMOS analog integrated circuits; CMOS integrated circuits; Feedforward systems; Integrated circuit modeling; MOS devices; Neural network hardware; Neural networks; Process design; Semiconductor device modeling;
fLanguage
English
Journal_Title
Micro, IEEE
Publisher
ieee
ISSN
0272-1732
Type
jour
DOI
10.1109/40.45828
Filename
45828
Link To Document