DocumentCode
82268
Title
Readout Hardware and Firmware Architecture of the HFT PXL Detector at STAR
Author
Schambach, Joachim ; Greiner, Leo ; Stezelberger, Thorsten ; Xiangming Sun ; Szelezniak, M. ; Chinh Vu
Author_Institution
Univ. of Texas, Austin, TX, USA
Volume
60
Issue
5
fYear
2013
fDate
Oct. 2013
Firstpage
3689
Lastpage
3693
Abstract
The “Heavy Flavor Tracker” (HFT) is an approved micro-vertex detector upgrade to the STAR experiment at RHIC, consisting of three subsystems with various technologies of silicon sensors arranged in 4 concentric cylinders, to be installed in STAR by 2014. This new vertex detector will improve the track-pointing resolution in STAR to a distance of closest approach (DCA) of ~ 30 μm in order to allow for a direct and full topological reconstruction of heavy quark meson decays and a better determination of the heavy quark meson spectra. The two innermost layers of the HFT close to the beam pipe, the Pixel (“PXL”) subsystem, employ CMOS monolithic active pixel sensor (MAPS) technology that integrates the sensor, front-end electronics, and zero-suppression circuitry in one silicon wafer. The PXL layers of the HFT will consist of 400 MAPS sensors arranged in 40 ladders (10 ladders at a radius of 2.5 cm and 30 ladders at 8 cm from the beam), each containing 10 of these sensors. This paper will present selected design characteristics of the PXL detector part of the HFT and the hardware and firmware architecture of the proposed readout system for this detector, as well as its integration into the existing STAR framework. A prototype of this readout system has recently been used at CERN to take data from a telescope consisting of 7 sensors arranged in parallel planes and shown to be fully functional.
Keywords
CMOS integrated circuits; firmware; high energy physics instrumentation computing; nuclear electronics; readout electronics; AD 2014; CMOS MAPS technology; CMOS monolithic active pixel sensor; HFT PXL detector; Heavy Flavor Tracker; Pixel subsystem; RHIC STAR experiment; distance of closest approach; firmware architecture; heavy quark meson decays; heavy quark meson spectra; microvertex detector upgrade; readout hardware; zero suppression circuitry; Data acquisition; Detectors; Field programmable gate arrays; Hardware; Silicon; Universal Serial Bus; Data acquisition; FPGA; MAPS; pixel; readout electronics; vertex detector;
fLanguage
English
Journal_Title
Nuclear Science, IEEE Transactions on
Publisher
ieee
ISSN
0018-9499
Type
jour
DOI
10.1109/TNS.2013.2272762
Filename
6578594
Link To Document