A fully monolithic 260-μW, 1-GHz subthreshold low noise amplifier

Author

Perumana, Bevin George ; Chakraborty, S. ; Chang-Ho Lee ; Laskar, J.

Author_Institution

Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA

Volume

15

Issue

6

fYear

2005

fDate

6/1/2005 12:00:00 AM

Firstpage

428

Lastpage

430

Abstract

A micro-power complementary metal oxide semiconductor (CMOS) low-noise amplifier (LNA) is presented based on subthreshold MOS operation in the GHz range. The LNA is fabricated in an 0.18-μm CMOS process and has a gain of 13.6 dB at 1 GHz while drawing 260 μA from a 1-V supply. An unrestrained bias technique, that automatically increases bias currents at high input power levels, is used to raise the input P1dB to -0.2 dBm. The LNA has a measured noise figure of 4.6 dB and an IIP3 of 7.2 dBm.

Keywords

CMOS analogue integrated circuits; UHF amplifiers; UHF integrated circuits; low-power electronics; monolithic integrated circuits; 0.18 micron; 1 GHz; 1 V; 13.6 dB; 260 muA; 260 muW; 4.6 dB; CMOS process; GHz range operation; complementary metal oxide semiconductor low-noise amplifier; fully monolithic subthreshold low noise amplifier; metal-oxide-semiconductor field-effect transistors; micropower circuits; subthreshold MOS operation; unrestrained bias technique; Circuits; Frequency; Gain; Impedance; Inductors; Low-noise amplifiers; MOS devices; Noise figure; Semiconductor device noise; Transconductance; Low-noise amplifier (LNA); metal-oxide-semiconductor field-effect transistors (MOSFETs); micro-power circuits; weak-inversion;

fLanguage

English

Journal_Title

Microwave and Wireless Components Letters, IEEE

Publisher

ieee

ISSN

1531-1309

Type

jour

DOI

10.1109/LMWC.2005.850563

Filename

1435446