DocumentCode
822771
Title
Leakage and process variation effects in current testing on future CMOS circuits
Author
Keshavarzi, Ali ; Tschanz, James W. ; Narendra, Siva ; De, Vivek ; Daasch, W. Robert ; Roy, Kaushik ; Sachdev, Manoj ; Hawkins, Charles F.
Author_Institution
Microprocessor Res. Labs., Intel Corp., Portland, OR, USA
Volume
19
Issue
5
fYear
2002
Firstpage
36
Lastpage
43
Abstract
Barriers to technology scaling, such as leakage and parameter variations, challenge the effectiveness of current-based test techniques. This correlative multiparameter test approach improves current testing sensitivity, exploiting dependencies of transistor and circuit leakage on operating frequency, temperature, and body bias to discriminate fast but intrinsically leaky ICs from defective ones
Keywords
CMOS integrated circuits; integrated circuit testing; leakage currents; CMOS circuits; current testing; leakage; leaky ICs; parameter variations; process variation effects; CMOS process; CMOS technology; Circuit testing; Frequency; Integrated circuit testing; Leakage current; Manufacturing; Microprocessors; Temperature dependence; Temperature sensors;
fLanguage
English
Journal_Title
Design & Test of Computers, IEEE
Publisher
ieee
ISSN
0740-7475
Type
jour
DOI
10.1109/MDT.2002.1033790
Filename
1033790
Link To Document