• DocumentCode
    823205
  • Title

    STI/LOCOS compatible LDMOS structure in standard CMOS

  • Author

    Ramos, J. ; Steyaert, M.

  • Author_Institution
    Dept. Elektrotechniek, Katholieke Univ. Leuven, Heverlee, Belgium
  • Volume
    39
  • Issue
    19
  • fYear
    2003
  • Firstpage
    1417
  • Lastpage
    1419
  • Abstract
    A novel high-voltage transistor structure compatible with shallow trench isolation and local oxidation of silicon is described. This device, which can be implemented in a standard CMOS process, is capable of handling high voltages without destruction. A duplication of the breakdown voltage was measured.
  • Keywords
    CMOS integrated circuits; isolation technology; oxidation; power MOSFET; semiconductor device breakdown; CMOS process; LDMOS structure; LOCOS; STI; breakdown voltage; high-voltage transistor;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:20030916
  • Filename
    1244178
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=823205