• DocumentCode
    824901
  • Title

    Partitioned gate tunnelling current model considering distributed effect for CMOS devices with ultra-thin (1 nm) gate oxide

  • Author

    Lin, C.H. ; Kuo, J.B. ; Su, K.W. ; Liu, S.

  • Author_Institution
    Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
  • Volume
    42
  • Issue
    3
  • fYear
    2006
  • Firstpage
    182
  • Lastpage
    184
  • Abstract
    The partitioned gate tunnelling current model considering the distributed effect for CMOS devices with an ultra-thin (1 nm) gate oxide is reported. As verified by the experimentally measured data, the partitioned gate tunnelling current model considering the distributed effect provides a better prediction of the total gate, drain and source currents as compared to the BSIM4 model.
  • Keywords
    CMOS integrated circuits; nanotechnology; semiconductor device models; tunnelling; 1 nm; BSIM4 model; CMOS devices; partitioned gate tunnelling current model; ultra thin gate oxide;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:20064060
  • Filename
    1593317
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=824901