• DocumentCode
    837277
  • Title

    An O(bn2) time algorithm for optimal buffer insertion with b buffer types

  • Author

    Li, Zhuo ; Shi, Weiping

  • Author_Institution
    Dept. of Electr. Eng., Texas A&M Univ., College Station, TX, USA
  • Volume
    25
  • Issue
    3
  • fYear
    2006
  • fDate
    3/1/2006 12:00:00 AM
  • Firstpage
    484
  • Lastpage
    489
  • Abstract
    Buffer insertion is a popular technique to reduce the interconnect delay. The classic buffer insertion algorithm of van Ginneken has a time complexity of O(n2), where n is the number of buffer positions. Lillis, Cheng, and Lin extended van Ginneken´s algorithm to allow b buffer types in O(b2n2) time. For modern design libraries that contain hundreds of buffers, it is a serious challenge to balance the speed and performance of the buffer insertion algorithm. In this paper, we present a new algorithm that computes the optimal buffer insertion in O(bn2) time. The reduction is achieved by the observation that the (Q,C) pairs of the candidates that generate the new candidates must form a convex hull. On industrial test cases, the new algorithm is faster than the previous best buffer insertion algorithms by orders of magnitude. Since van Ginneken´s algorithm with multiple buffer types are used by most existing algorithms on buffer insertion and buffer sizing, our new algorithm improves the performance of all these algorithms.
  • Keywords
    buffer circuits; circuit CAD; circuit complexity; circuit optimisation; delays; integrated circuit interconnections; network routing; Elmore delay; buffer sizing; buffer types; circuit routing; data structures; interconnect delay reduction; optimal buffer insertion; time algorithms; time complexity; Algorithm design and analysis; Capacitance; Clustering algorithms; Data structures; Delay; Design optimization; Libraries; Routing; Testing; Timing; Buffer insertion; Elmore delay; data structure; interconnect; routing;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.2005.854631
  • Filename
    1597383