Title :
A synthesis environment for designing DSP systems
Author :
Casavant, A.E. ; d´Abreu, M.A. ; Dragomirecky, M. ; Duff, D.A. ; Jasica, J.R. ; Hartman, M.J. ; Hwang, K.S. ; Smith, W.D.
Author_Institution :
Res. & Dev. Center, General Electric Corp., Schenectady, NY, USA
fDate :
4/1/1989 12:00:00 AM
Abstract :
The authors describe a high-level synthesis tool that addresses the broad range of throughput requirements inherent in all DSP (digital signal processor) systems. The primary role of this system, called FACE (flexible architecture compilation environment), is to provide a set of algorithms that adequately support architecturally specific hardware synthesis for a class of DSP applications. They first identify the shortcomings of Parsifal, an earlier synthesis system, and discuss the requirements for FACE. They examine briefly the architectural issues. They then describe FACE´s synthesis algorithms.<>
Keywords :
circuit CAD; computer architecture; digital signal processing chips; multiprocessing systems; DSP systems; FACE; Parsifal; architecturally specific hardware synthesis; digital signal processor; flexible architecture compilation environment; high-level synthesis tool; synthesis algorithms; throughput requirements; Algorithm design and analysis; Assembly; Digital signal processing; Digital signal processing chips; Hardware; Libraries; Signal design; Signal processing algorithms; Signal synthesis; Throughput;
Journal_Title :
Design & Test of Computers, IEEE
