• DocumentCode
    842138
  • Title

    A CMOS multichannel 10-Gb/s transceiver

  • Author

    Takauchi, Hideki ; Tamura, Hirotaka ; Matsubara, Satoshi ; Kibune, Masaya ; Doi, Yoshiyasu ; Chiba, Takaya ; Anbutsu, Hideaki ; Yamaguchi, Hisakatsu ; Mori, Toshihiko ; Takatsu, Motomu ; Gotoh, Kohtaroh ; Sakai, Toshiaki ; Yamamura, Takeshi

  • Author_Institution
    Fujitsu Labs. Ltd., Kanagawa, Japan
  • Volume
    38
  • Issue
    12
  • fYear
    2003
  • Firstpage
    2094
  • Lastpage
    2100
  • Abstract
    We describe a CMOS multichannel transceiver that transmits and receives 10 Gb/s per channel over balanced copper media. The transceiver consists of two identical 10-Gb/s modules. Each module operates off a single 1.2-V supply and has a single 5-GHz phase-locked loop to supply a reference clock to two transmitter (Tx) channels and two receiver (Rx) channels. To track the input-signal phase, the Rx channel has a clock recovery unit (CRU), which uses a phase-interpolator-based timing generator and digital loop filter. The CRU can adjust the recovered clock phase with a resolution of 1.56 ps. Two sets of two-channel transceiver units were fabricated in 0.11-μm CMOS on a single test chip. The transceiver unit size was 1.6 mm × 2.6 mm. The Rx sensitivity was 120-mVp-p differential with a 70-ps phase margin for a common-mode voltage ranging from 0.6 to 1.0 V. The evaluated jitter tolerance curve met the OC-192 specification.
  • Keywords
    CMOS integrated circuits; high-speed integrated circuits; jitter; logic circuits; phase locked loops; transceivers; 0.11-μm CMOS; 0.6 to 1 V; 1.2 V; 1.6 mm; 10 Gbit/s; 10-Gb/s modules; 120-mVp-p differential; 2.6 mm; 5 GHz; 5-GHz phase-locked loop; 70-ps phase margin; CMOS integrated circuits; CMOS multichannel 10-Gb/s transceiver; CMOS multichannel transceiver; OC-192 specification; Rx sensitivity; balanced copper media; clock recovery unit; common-mode voltage; current-mode logic; digital loop filter; high-speed integrated circuits; input-signal phase tracking; jitter tolerance curve; phase control; phase-interpolator-based timing generator; phase-locked loops; receiver channels; reference clock; single test chip; transceiver unit; transmitter channels; Clocks; Copper; Digital filters; Phase locked loops; Testing; Timing; Tracking loops; Transceivers; Transmitters; Voltage;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.2003.818577
  • Filename
    1253856