Title :
250-MHz BiCMOS super-high-speed video signal processor (S-VSP) ULSI
Author :
Goto, Junichi ; Ando, Kouichi ; Inoue, Toshiaki ; Yamashina, Masakazu ; Yamada, Hachiro ; Enomoto, Tadayoshi
Author_Institution :
NEC Corp., of Kanagawa-ken, Japan
fDate :
12/1/1991 12:00:00 AM
Abstract :
A 250-MHz, 16-b, fixed-point, super-high-speed video signal processor (S-VSP) ULSI has been developed for constructing a video teleconferencing system. Two major technologies have been developed. One is a high-speed large-capacity on-chip memory architecture that achieves both 250-MHz internal signal processing and 13.5-MHz input and output buffering. The other is a circuit technology that achieves 250-MHz operations with a convolver/multiplier, an arithmetic logic unit (ALU), an accumulator, and various kinds of static RAMs (SRAMs). A phase-locked loop (PLL) is also integrated to generate a 250-MHz internal clock. The S-VSP ULSI, which was fabricated with 0.8-μm BiCMOS and triple-level-metallization technology, has a 15.5-mm×13.0-mm area and contains about 1.13 million transistors. It consumes 7 W at 250-MHz internal clock frequency with a single 5-V power supply
Keywords :
BIMOS integrated circuits; VLSI; computerised picture processing; digital signal processing chips; telecommunications computing; teleconferencing; video signals; 13.5 MHz; 16 bit; 250 MHz; 5 V; 7 W; ALU; BiCMOS; DSP; PLL; SRAMs; ULSI; accumulator; arithmetic logic unit; convolver/multiplier; internal clock frequency; large-capacity on-chip memory architecture; phase-locked loop; single 5-V power supply; static RAMs; super-high-speed; triple-level-metallization; video signal processor; video teleconferencing system; BiCMOS integrated circuits; Clocks; Convolvers; Integrated circuit technology; Memory architecture; Phase locked loops; Signal processing; Teleconferencing; Ultra large scale integration; Video signal processing;
Journal_Title :
Solid-State Circuits, IEEE Journal of