A 150-MHz direct digital frequency synthesizer in 1.25-μm CMOS with -90-dBc spurious performance

A monolithic CMOS direct digital frequency synthesizer (DDFS) is presented which simultaneously achieves high spectral purity and wide bandwidth. Phase noise of the output sine wave is equivalent to or better than that of the 150-MHz reference clock. The synthesizer covers a bandwidth from DC to 75 MHz in steps of 0.035 Hz with a switching speed of 6.7 ns and a tuning latency of 13 clock cycles. An efficient look-up table method for calculating the sine function reduces ROM storage requirements by a factor of 128:1. All circuit designs are fully static and are tolerant to transistor threshold shifts caused by radiation or process variations. The DDFS was fabricated in a 1.25-μm radiation-hardened double-level metal bulk P-well CMOS process which is tolerant to over 10⁶ rd(Si) of total dose radiation. The die size is 195 mil×195 mil with a device count of 35,000 transistors. Power dissipation is 950 mW at a clock rate of 100 MHz