DocumentCode
844570
Title
Co-optimization of the metal gate/high-k stack to achieve high-field mobility >90% of SiO2 universal mobility with an EOT=∼1 nm
Author
Zhang, Zhibo ; Song, S.C. ; Quevedo-Lopez, M.A. ; Choi, Kisik ; Kirsch, Paul ; Lysaght, Pat ; Lee, Byoung Hun
Author_Institution
Texas Instrum. Inc., Dallas, TX, USA
Volume
27
Issue
3
fYear
2006
fDate
3/1/2006 12:00:00 AM
Firstpage
185
Lastpage
187
Abstract
HfO2 and HfSiON gate dielectrics with high-field electron mobility greater than 90% of the SiO2 universal mobility and equivalent oxide thickness (EOT) approaching 1 nm are successfully achieved by co-optimizing the metal gate/high-k/bottom interface stack. Besides the thickness of the high-κ dielectrics, the thickness of the ALD TiN metal gate and the formation of the bottom interface also play an important role in scaling EOT and achieving high electron mobility. A phase transformation is observed for aggressively scaled HfO2 and HfSiON, which may be responsible for the high mobility and low charge trapping of the optimized HfO2 gate stack.
Keywords
CMOS integrated circuits; MOSFET; atomic layer deposition; electron mobility; electron traps; hafnium compounds; high-k dielectric thin films; silicon compounds; titanium compounds; ALD; CMOS processing; MOSFET; TiN-HfO2; TiN-HfSiON; atomic layer deposition; charge carrier mobility; charge trapping; equivalent oxide thickness; gate stack; high electron mobility; high-k dielectrics; metal gate/high-k interface stack; phase transformation; universal mobility; Amorphous materials; CMOS process; CMOS technology; Dielectric substrates; Electron mobility; Electron traps; Hafnium oxide; High K dielectric materials; High-K gate dielectrics; Tin; Charge carrier mobility; HfO; HfSiON; MOSFETs; high-; metal gate;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/LED.2006.870245
Filename
1599474
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