DocumentCode
848487
Title
The use of an interface anneal to control the base current and emitter resistance of p-n-p polysilicon emitter bipolar transistors
Author
Post, Ian R C ; Ashburn, Peter
Author_Institution
Dept. of Electron. & Comput. Sci., Southampton Univ., UK
Volume
13
Issue
8
fYear
1992
Firstpage
408
Lastpage
410
Abstract
The effects of an interface anneal on the electrical characteristics of p-n-p polysilicon-emitter bipolar transistors are reported. For devices with a deliberately grown interfacial oxide layer, an interface anneal at 1100 degrees C leads to a factor of 15 increase in base current, and a factor of 2.5 decrease in emitter resistance, compared with an unannealed control device. These results are compared with identical interface anneals performed on n-p-n devices, and it is shown that the increase in base current for p-n-p devices is considerably smaller than that for the n-p-n devices. This result is explained by the presence of fluorine in the p-n-p devices, which accelerates the breakup of the interfacial layer.<>
Keywords
annealing; bipolar transistors; contact resistance; elemental semiconductors; semiconductor device testing; silicon; surface treatment; 1100 degC; Gummel plots; Si-SiO/sub 2/; base current; electrical characteristics; emitter resistance; interface anneal; interfacial layer breakup; interfacial oxide layer; n-p-n devices; p-n-p polysilicon emitter bipolar transistors; Acceleration; Annealing; Bipolar transistors; Circuits; Electric resistance; Electric variables; Electrical resistance measurement; Hafnium; Lead compounds; Temperature;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/55.192774
Filename
192774
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