DocumentCode :
848592
Title :
Electromigration performance of electroless plated copper/Pd-silicide metallization
Author :
Tao, Jiang ; Cheung, Nathan W. ; Hu, Chenming ; Kang, H.-K. ; Wong, S. Simon
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
Volume :
13
Issue :
8
fYear :
1992
Firstpage :
433
Lastpage :
435
Abstract :
The electromigration reliability of Cu interconnects has been studied under DC, pulse-DC, and bipolar current stressing conditions. Electroless plating was used to selectively deposit Cu in oxide trenches by using Pd silicide as a catalytic layer at the bottom of the trenches to initiate copper deposition. The DC and pulse-DC lifetimes of Cu are found to be about two orders of magnitude longer than that of Al-2%Si at 275 degrees C, and about four orders of magnitude longer than that of Al-2%Si when extrapolated to room temperature. On the other hand, Cu AC lifetimes are found to be comparable to the AC lifetimes of Al-2%Si. The pulse-DC lifetime of copper interconnects follows the similar frequency and duty factor dependence as aluminium and the prediction of the vacancy relaxation model.<>
Keywords :
copper; electroless deposited coatings; electromigration; metallisation; palladium compounds; reliability; AC lifetimes; Cu-PdSi metallization; DC stressing; bipolar current stressing; catalytic layer; duty factor dependence; electroless plating; electromigration reliability; interconnects; oxide trenches; pulse-DC lifetimes; selective deposition; vacancy relaxation model; Aluminum; Conductivity; Copper; Dry etching; Electromigration; Metallization; Probes; Semiconductor films; Temperature; Testing;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/55.192782
Filename :
192782
Link To Document :
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