• DocumentCode
    849667
  • Title

    Area-time efficient sign detection technique for binary signed-digit number system

  • Author

    Srikanthan, T. ; Lam, S.K. ; Suman, Mishra

  • Author_Institution
    Centre for High Performance Embedded Syst., Nanyang Technol. Univ., Singapore
  • Volume
    53
  • Issue
    1
  • fYear
    2004
  • fDate
    1/1/2004 12:00:00 AM
  • Firstpage
    69
  • Lastpage
    72
  • Abstract
    Computer arithmetic operations based on the BSD (binary signed-digit) number representation system lend themselves well to high-speed computations due to the facilitation of limited carry addition/subtraction. We propose an area-time efficient method for sign detection in a BSD number system based on optimized reverse tree structure. When compared to other popular approaches, such as the most significant carry detection-based CLA (carry look-ahead) and MRC (multilevel reverse carry) implementations, the proposed method is superior to both area and time costs in VLSI. Synthesis results for different word lengths show that the proposed approach to sign detection in the BSD number system continues to maintain its advantage over area and time measures.
  • Keywords
    VLSI; adders; carry logic; logic gates; CLA; MRC; VLSI; binary signed digit number system; carry look ahead; computer arithmetic operation; most significant carry detection; multilevel reverse carry; sign detection technique; Area measurement; Arithmetic; Costs; Encoding; Length measurement; Logic; Optimization methods; Time measurement; Tree data structures; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/TC.2004.1255791
  • Filename
    1255791