Analog FIR filters with an oversampled Σ-Δ modulator

An FIR filter configuration is presented which uses a Σ-Δ modulator as front-end. The modulator converts an analog input into a high-speed binary sequence, which can be delayed and shifted with a binary shift register. Replacing an analog delay line by a binary shift register reduces the cost of silicon area and power, and improves the immunity of the delay line to interferences. The high-frequency quantization noise introduced by the modulator is removed naturally by the FIR filter to be implemented, so that the analog output is reconstructed accurately at the filter output without requiring additional hardware. Experimental results are presented