• DocumentCode
    853650
  • Title

    Microdeformation analysis of packages and interconnects to improve finite element models for reliability assessments

  • Author

    Kaulfersch, Eberhard ; Vogel, Dietmar ; Michel, Bernd

  • Author_Institution
    Dept. of Mech. Reliability & Micro Mater., Fraunhofer Inst. for Reliability & Microintegration, Berlin, Germany
  • Volume
    26
  • Issue
    3
  • fYear
    2003
  • fDate
    7/1/2003 12:00:00 AM
  • Firstpage
    239
  • Lastpage
    244
  • Abstract
    The quality of mechanical modeling is of essential influence on the success of finite element analysis (FEA) and of subsequent studies of failure mechanisms. Missing knowledge about time and temperature dependent material behavior often leads to uncertainties in constitutive material description of rather complex structures like filled underfills or organic substrates. Micro deformation measurement methods help to overcome the problem by supplying displacement and strain fields comparable with FEA results. MicroDAC is an established versatile measurement tool for local and global deformation analyzes on thermally or mechanically stressed specimens. The paper presents the basics of the microDAC concept and different kinds of measurements on chip scale packages (CSP) and on flip chip assemblies to illustrate the application to integrated circuit (IC) packaging. A modified microDAC algorithm has been used to determine coefficients of thermal expansion (CTE) at small sized material samples and materials of anisotropic CTEs.
  • Keywords
    chip scale packaging; correlation methods; electronic engineering computing; finite element analysis; flip-chip devices; image resolution; integrated circuit interconnections; integrated circuit reliability; production engineering computing; software tools; strain measurement; thermal expansion; thermal management (packaging); thermal stresses; MicroDAC tool; chip scale packages; coefficients of thermal expansion; constitutive material description; digital correlation analysis; electronic packages; failure mechanisms; finite element analysis; flip chip assemblies; image processing algorithms; interconnects; lateral image resolution; mathematical algorithms; mechanical modeling; mechanically stressed specimens; microdeformation analysis; reliability assessments; software codes; solder joint strains; thermally stressed specimens; Application specific integrated circuits; Chip scale packaging; Failure analysis; Finite element methods; Integrated circuit interconnections; Integrated circuit measurements; Integrated circuit packaging; Organic materials; Semiconductor device measurement; Strain measurement;
  • fLanguage
    English
  • Journal_Title
    Electronics Packaging Manufacturing, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1521-334X
  • Type

    jour

  • DOI
    10.1109/TEPM.2003.820799
  • Filename
    1256728