• DocumentCode
    85494
  • Title

    Simplified drain current model for pinch-off double gate junctionless transistor

  • Author

    Sahu, Chitrakant ; Swami, Piyush ; Sharma, Shantanu ; Singh, Jaskirat

  • Author_Institution
    Indian Inst. of Inf. Technol., Design & Manuf., Jabalpur, India
  • Volume
    50
  • Issue
    2
  • fYear
    2014
  • fDate
    January 16 2014
  • Firstpage
    116
  • Lastpage
    118
  • Abstract
    A simplified analytical drain current model for the long-channel pinch-off junctionless (JL) double-gate field effect transistor (DGFET) is proposed. The drain current is generally expressed in terms of the mobile charge density and it has been expressed in terms of the pinch-off voltage and the gate capacitance. The proposed model is validated against TCAD simulation results, and is able to predict the behaviour of the JL DGFET for different bias conditions and device dimensions, accurately. The transconductance and the transconductance-to-drain-current ratio are important parameters for analogue circuits, and have been calculated and exhibit good agreement with the TCAD results.
  • Keywords
    analogue circuits; field effect transistors; JL DGFET; TCAD simulation; analogue circuits; bias conditions; device dimensions; gate capacitance; long-channel pinch-off junctionless double-gate field effect transistor; mobile charge density; pinch-off voltage; simplified analytical drain current model; transconductance-to-drain-current ratio;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el.2013.3342
  • Filename
    6729342