DocumentCode
856307
Title
Single phase clock scheme for mobile logic gates
Author
Pettenghi, H. ; Avedillo, M.J. ; Quintana, J.M.
Author_Institution
Centro Nacional de Microelectron., Inst. de Microelectron. de Sevilla
Volume
42
Issue
24
fYear
2006
Firstpage
1382
Lastpage
1383
Abstract
Many logic circuit applications of resonant tunnelling diodes are based on the MOnostable-BIstable Logic Element (MOBILE). Cascaded MOBILE gates are operated in a pipelined fashion using a four phase overlapping clocking scheme. To improve the robustness of MOBILE networks, a simpler clock scheme is desirable. It is demonstrated that a network of MOBILE gates can be operated with a single clocked bias signal. Both schemes are compared
Keywords
logic gates; resonant tunnelling diodes; timing; cascaded mobile gates; logic circuit; mobile logic gates; monostable-bistable logic element; overlapping clocking scheme; resonant tunnelling diodes; single phase clock scheme;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:20062393
Filename
4027904
Link To Document